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Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder

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Submitted On:
17 September 2017 - 1:38am
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Type:
Poster
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Document Year:
2017
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icip2017postercll.pdf

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[1] , "Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder", IEEE SigPort, 2017. [Online]. Available: http://sigport.org/2206. Accessed: Apr. 25, 2019.
@article{2206-17,
url = {http://sigport.org/2206},
author = { },
publisher = {IEEE SigPort},
title = {Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder},
year = {2017} }
TY - EJOUR
T1 - Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder
AU -
PY - 2017
PB - IEEE SigPort
UR - http://sigport.org/2206
ER -
. (2017). Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder. IEEE SigPort. http://sigport.org/2206
, 2017. Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder. Available at: http://sigport.org/2206.
. (2017). "Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder." Web.
1. . Coding Sensitive based Approximation Algorithm for Power Efficient VBS-DCT VLSI Design in HEVC Hardwired Intra Encoder [Internet]. IEEE SigPort; 2017. Available from : http://sigport.org/2206