Sorry, you need to enable JavaScript to visit this website.

Low-power signal processing techniques and architectures

Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders

Alexandre MERCAT

Paper Details

Authors:
Alexandre MERCAT
Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard
Submitted On:
3 March 2017 - 9:00am
Short Link:
Type:
Event:
Presenter's Name:
Paper Code:
Document Year:
Cite

Document Files

ICASSP_2017_Allocator.pdf

(57 downloads)

Keywords

Subscribe

Send Author a Private Message
[1] Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard, "Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders", IEEE SigPort, 2017. [Online]. Available: http://sigport.org/1611. Accessed: Aug. 24, 2017.
@article{1611-17,
url = {http://sigport.org/1611},
author = {Alexandre Mercat; Florian Arrestier; Wassim Hamidouche; Maxime Pelcat; Daniel Menard },
publisher = {IEEE SigPort},
title = {Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders},
year = {2017} }
TY - EJOUR
T1 - Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders
AU - Alexandre Mercat; Florian Arrestier; Wassim Hamidouche; Maxime Pelcat; Daniel Menard
PY - 2017
PB - IEEE SigPort
UR - http://sigport.org/1611
ER -
Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard. (2017). Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders. IEEE SigPort. http://sigport.org/1611
Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard, 2017. Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders. Available at: http://sigport.org/1611.
Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard. (2017). "Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders." Web.
1. Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard. Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders [Internet]. IEEE SigPort; 2017. Available from : http://sigport.org/1611

Energy Reduction Opportunities in an HEVC Real-Time Encoder

Alexandre MERCAT

Paper Details

Authors:
Alexandre MERCAT
Florian ARRESTIER , Wassim HAMIDOUCHE, Maxime PELCAT, Daniel MENARD
Submitted On:
3 March 2017 - 8:55am
Short Link:
Type:
Event:
Presenter's Name:
Paper Code:
Document Year:
Cite

Document Files

ICASSP_2017_Energy_paper.pdf

(66 downloads)

Keywords

Subscribe

Send Author a Private Message
[1] Florian ARRESTIER , Wassim HAMIDOUCHE, Maxime PELCAT, Daniel MENARD, "Energy Reduction Opportunities in an HEVC Real-Time Encoder", IEEE SigPort, 2017. [Online]. Available: http://sigport.org/1610. Accessed: Aug. 24, 2017.
@article{1610-17,
url = {http://sigport.org/1610},
author = {Florian ARRESTIER ; Wassim HAMIDOUCHE; Maxime PELCAT; Daniel MENARD },
publisher = {IEEE SigPort},
title = {Energy Reduction Opportunities in an HEVC Real-Time Encoder},
year = {2017} }
TY - EJOUR
T1 - Energy Reduction Opportunities in an HEVC Real-Time Encoder
AU - Florian ARRESTIER ; Wassim HAMIDOUCHE; Maxime PELCAT; Daniel MENARD
PY - 2017
PB - IEEE SigPort
UR - http://sigport.org/1610
ER -
Florian ARRESTIER , Wassim HAMIDOUCHE, Maxime PELCAT, Daniel MENARD. (2017). Energy Reduction Opportunities in an HEVC Real-Time Encoder. IEEE SigPort. http://sigport.org/1610
Florian ARRESTIER , Wassim HAMIDOUCHE, Maxime PELCAT, Daniel MENARD, 2017. Energy Reduction Opportunities in an HEVC Real-Time Encoder. Available at: http://sigport.org/1610.
Florian ARRESTIER , Wassim HAMIDOUCHE, Maxime PELCAT, Daniel MENARD. (2017). "Energy Reduction Opportunities in an HEVC Real-Time Encoder." Web.
1. Florian ARRESTIER , Wassim HAMIDOUCHE, Maxime PELCAT, Daniel MENARD. Energy Reduction Opportunities in an HEVC Real-Time Encoder [Internet]. IEEE SigPort; 2017. Available from : http://sigport.org/1610

Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving

Yanxiang Huang

In this work, we consider the potential of processing at the semiconductor edge by allowing voltage over-scaling and complete antenna signal failures, focusing on the per-antenna digital functionality that dominant the DSP complexity. The impact of the resulting hardware errors on the performance of Massive MIMO transmission is analyzed. It shows that the inherent redundancy in the system brings a solid tolerance to sporadic hardware errors. Potential control tactics are introduced, that could further optimize the operation of the error-prone circuitry.

Paper Details

Authors:
Yanxiang Huang
Yanxiang Huang, Claude Desset, André Bourdoux, Wim Dehaene, Liesbet Van der Perre
Submitted On:
3 March 2017 - 7:15am
Short Link:
Type:
Event:
Presenter's Name:
Paper Code:
Document Year:
Cite

Document Files

SPCOM_L1_6_Huang_v3.pdf

(69 downloads)

Keywords

Subscribe

Send Author a Private Message
[1] Yanxiang Huang, Claude Desset, André Bourdoux, Wim Dehaene, Liesbet Van der Perre, "Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving", IEEE SigPort, 2017. [Online]. Available: http://sigport.org/1607. Accessed: Aug. 24, 2017.
@article{1607-17,
url = {http://sigport.org/1607},
author = {Yanxiang Huang; Claude Desset; André Bourdoux; Wim Dehaene; Liesbet Van der Perre },
publisher = {IEEE SigPort},
title = {Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving},
year = {2017} }
TY - EJOUR
T1 - Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving
AU - Yanxiang Huang; Claude Desset; André Bourdoux; Wim Dehaene; Liesbet Van der Perre
PY - 2017
PB - IEEE SigPort
UR - http://sigport.org/1607
ER -
Yanxiang Huang, Claude Desset, André Bourdoux, Wim Dehaene, Liesbet Van der Perre. (2017). Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving. IEEE SigPort. http://sigport.org/1607
Yanxiang Huang, Claude Desset, André Bourdoux, Wim Dehaene, Liesbet Van der Perre, 2017. Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving. Available at: http://sigport.org/1607.
Yanxiang Huang, Claude Desset, André Bourdoux, Wim Dehaene, Liesbet Van der Perre. (2017). "Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving." Web.
1. Yanxiang Huang, Claude Desset, André Bourdoux, Wim Dehaene, Liesbet Van der Perre. Massive MIMO Processing at the Semiconductor Edge: Exploring the System and Circuit Margins for Power Saving [Internet]. IEEE SigPort; 2017. Available from : http://sigport.org/1607