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Compilers and tools for DSP implementation

AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS


In recent years, the number and variety of heterogeneous multiprocessor system-on-chip MPSoCs, such as for instance Zynq platforms, has sensibly increased. However, today all design flow solutions capable of programming the different components of such platforms require to the designer either to modify the software or hardware based designs to obtain higher performance implementations. Thus, the developer needs to either rewrite functional blocks in HDL or to use high-level synthesis of C-like sequential languages with platform locked extensions.

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Authors:
Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli
Submitted On:
14 May 2019 - 8:07am
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[1] Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli, "AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS", IEEE SigPort, 2019. [Online]. Available: http://sigport.org/4508. Accessed: Jul. 19, 2019.
@article{4508-19,
url = {http://sigport.org/4508},
author = {Simone Casale Brunet; Romuald Mosqueron; Marco Mattavelli },
publisher = {IEEE SigPort},
title = {AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS},
year = {2019} }
TY - EJOUR
T1 - AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS
AU - Simone Casale Brunet; Romuald Mosqueron; Marco Mattavelli
PY - 2019
PB - IEEE SigPort
UR - http://sigport.org/4508
ER -
Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli. (2019). AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS. IEEE SigPort. http://sigport.org/4508
Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli, 2019. AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS. Available at: http://sigport.org/4508.
Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli. (2019). "AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS." Web.
1. Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli. AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS [Internet]. IEEE SigPort; 2019. Available from : http://sigport.org/4508

Rapid Customization of Image Processors Using Halide

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Authors:
Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen
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23 February 2016 - 1:44pm
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[1] Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen, "Rapid Customization of Image Processors Using Halide", IEEE SigPort, 2015. [Online]. Available: http://sigport.org/527. Accessed: Jul. 19, 2019.
@article{527-15,
url = {http://sigport.org/527},
author = {Ville Korhonen; Pekka Jääskeläinen; Matias Koskela; Timo Viitanen },
publisher = {IEEE SigPort},
title = {Rapid Customization of Image Processors Using Halide},
year = {2015} }
TY - EJOUR
T1 - Rapid Customization of Image Processors Using Halide
AU - Ville Korhonen; Pekka Jääskeläinen; Matias Koskela; Timo Viitanen
PY - 2015
PB - IEEE SigPort
UR - http://sigport.org/527
ER -
Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen. (2015). Rapid Customization of Image Processors Using Halide. IEEE SigPort. http://sigport.org/527
Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen, 2015. Rapid Customization of Image Processors Using Halide. Available at: http://sigport.org/527.
Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen. (2015). "Rapid Customization of Image Processors Using Halide." Web.
1. Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen. Rapid Customization of Image Processors Using Halide [Internet]. IEEE SigPort; 2015. Available from : http://sigport.org/527

HSA-Enabled DSPs and Accelerators

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Authors:
John Glossner, Paul Blinzer
Submitted On:
23 February 2016 - 1:44pm
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HSA DSP_GlobalSIP_final_.pdf

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[1] John Glossner, Paul Blinzer, "HSA-Enabled DSPs and Accelerators", IEEE SigPort, 2015. [Online]. Available: http://sigport.org/526. Accessed: Jul. 19, 2019.
@article{526-15,
url = {http://sigport.org/526},
author = {John Glossner; Paul Blinzer },
publisher = {IEEE SigPort},
title = {HSA-Enabled DSPs and Accelerators},
year = {2015} }
TY - EJOUR
T1 - HSA-Enabled DSPs and Accelerators
AU - John Glossner; Paul Blinzer
PY - 2015
PB - IEEE SigPort
UR - http://sigport.org/526
ER -
John Glossner, Paul Blinzer. (2015). HSA-Enabled DSPs and Accelerators. IEEE SigPort. http://sigport.org/526
John Glossner, Paul Blinzer, 2015. HSA-Enabled DSPs and Accelerators. Available at: http://sigport.org/526.
John Glossner, Paul Blinzer. (2015). "HSA-Enabled DSPs and Accelerators." Web.
1. John Glossner, Paul Blinzer. HSA-Enabled DSPs and Accelerators [Internet]. IEEE SigPort; 2015. Available from : http://sigport.org/526

Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer

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Authors:
Amanullah Ghazi
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23 February 2016 - 1:44pm
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globalsip_dal.pdf

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[1] Amanullah Ghazi, "Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer", IEEE SigPort, 2015. [Online]. Available: http://sigport.org/362. Accessed: Jul. 19, 2019.
@article{362-15,
url = {http://sigport.org/362},
author = {Amanullah Ghazi },
publisher = {IEEE SigPort},
title = {Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer},
year = {2015} }
TY - EJOUR
T1 - Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer
AU - Amanullah Ghazi
PY - 2015
PB - IEEE SigPort
UR - http://sigport.org/362
ER -
Amanullah Ghazi. (2015). Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer. IEEE SigPort. http://sigport.org/362
Amanullah Ghazi, 2015. Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer. Available at: http://sigport.org/362.
Amanullah Ghazi. (2015). "Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer." Web.
1. Amanullah Ghazi. Multicore Execution of Dynamic Dataflow Programs on the Distributed Application Layer [Internet]. IEEE SigPort; 2015. Available from : http://sigport.org/362

Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications

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Authors:
Wictor Lund, Leonidas Tsipolous, Johan Lilius
Submitted On:
23 February 2016 - 1:44pm
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DeviceCrossoverPoint.pdf

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[1] Wictor Lund, Leonidas Tsipolous, Johan Lilius, "Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications", IEEE SigPort, 2015. [Online]. Available: http://sigport.org/294. Accessed: Jul. 19, 2019.
@article{294-15,
url = {http://sigport.org/294},
author = {Wictor Lund; Leonidas Tsipolous; Johan Lilius },
publisher = {IEEE SigPort},
title = {Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications},
year = {2015} }
TY - EJOUR
T1 - Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications
AU - Wictor Lund; Leonidas Tsipolous; Johan Lilius
PY - 2015
PB - IEEE SigPort
UR - http://sigport.org/294
ER -
Wictor Lund, Leonidas Tsipolous, Johan Lilius. (2015). Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications. IEEE SigPort. http://sigport.org/294
Wictor Lund, Leonidas Tsipolous, Johan Lilius, 2015. Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications. Available at: http://sigport.org/294.
Wictor Lund, Leonidas Tsipolous, Johan Lilius. (2015). "Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications." Web.
1. Wictor Lund, Leonidas Tsipolous, Johan Lilius. Determining a Device Crossover Point in CPU/GPU Systems for Streaming Applications [Internet]. IEEE SigPort; 2015. Available from : http://sigport.org/294