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Algorithm and architecture co-optimization

dMazeRunner: Optimizing Convolutions on Dataflow Accelerators

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Authors:
Shail Dave, Aviral Shrivastava, Youngbin Kim, Sasikanth Avancha, Kyoungwoo Lee
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7 June 2020 - 8:48pm
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[1] Shail Dave, Aviral Shrivastava, Youngbin Kim, Sasikanth Avancha, Kyoungwoo Lee, "dMazeRunner: Optimizing Convolutions on Dataflow Accelerators", IEEE SigPort, 2020. [Online]. Available: http://sigport.org/5461. Accessed: Oct. 01, 2020.
@article{5461-20,
url = {http://sigport.org/5461},
author = {Shail Dave; Aviral Shrivastava; Youngbin Kim; Sasikanth Avancha; Kyoungwoo Lee },
publisher = {IEEE SigPort},
title = {dMazeRunner: Optimizing Convolutions on Dataflow Accelerators},
year = {2020} }
TY - EJOUR
T1 - dMazeRunner: Optimizing Convolutions on Dataflow Accelerators
AU - Shail Dave; Aviral Shrivastava; Youngbin Kim; Sasikanth Avancha; Kyoungwoo Lee
PY - 2020
PB - IEEE SigPort
UR - http://sigport.org/5461
ER -
Shail Dave, Aviral Shrivastava, Youngbin Kim, Sasikanth Avancha, Kyoungwoo Lee. (2020). dMazeRunner: Optimizing Convolutions on Dataflow Accelerators. IEEE SigPort. http://sigport.org/5461
Shail Dave, Aviral Shrivastava, Youngbin Kim, Sasikanth Avancha, Kyoungwoo Lee, 2020. dMazeRunner: Optimizing Convolutions on Dataflow Accelerators. Available at: http://sigport.org/5461.
Shail Dave, Aviral Shrivastava, Youngbin Kim, Sasikanth Avancha, Kyoungwoo Lee. (2020). "dMazeRunner: Optimizing Convolutions on Dataflow Accelerators." Web.
1. Shail Dave, Aviral Shrivastava, Youngbin Kim, Sasikanth Avancha, Kyoungwoo Lee. dMazeRunner: Optimizing Convolutions on Dataflow Accelerators [Internet]. IEEE SigPort; 2020. Available from : http://sigport.org/5461

dMazeRunner: Optimizing Convolutions on Dataflow Accelerators

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7 June 2020 - 8:31pm
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[1] , "dMazeRunner: Optimizing Convolutions on Dataflow Accelerators", IEEE SigPort, 2020. [Online]. Available: http://sigport.org/5460. Accessed: Oct. 01, 2020.
@article{5460-20,
url = {http://sigport.org/5460},
author = { },
publisher = {IEEE SigPort},
title = {dMazeRunner: Optimizing Convolutions on Dataflow Accelerators},
year = {2020} }
TY - EJOUR
T1 - dMazeRunner: Optimizing Convolutions on Dataflow Accelerators
AU -
PY - 2020
PB - IEEE SigPort
UR - http://sigport.org/5460
ER -
. (2020). dMazeRunner: Optimizing Convolutions on Dataflow Accelerators. IEEE SigPort. http://sigport.org/5460
, 2020. dMazeRunner: Optimizing Convolutions on Dataflow Accelerators. Available at: http://sigport.org/5460.
. (2020). "dMazeRunner: Optimizing Convolutions on Dataflow Accelerators." Web.
1. . dMazeRunner: Optimizing Convolutions on Dataflow Accelerators [Internet]. IEEE SigPort; 2020. Available from : http://sigport.org/5460

dMazeRunner: Optimizing Convolutions on Dataflow Accelerators

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7 June 2020 - 8:31pm
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[1] , "dMazeRunner: Optimizing Convolutions on Dataflow Accelerators", IEEE SigPort, 2020. [Online]. Available: http://sigport.org/5459. Accessed: Oct. 01, 2020.
@article{5459-20,
url = {http://sigport.org/5459},
author = { },
publisher = {IEEE SigPort},
title = {dMazeRunner: Optimizing Convolutions on Dataflow Accelerators},
year = {2020} }
TY - EJOUR
T1 - dMazeRunner: Optimizing Convolutions on Dataflow Accelerators
AU -
PY - 2020
PB - IEEE SigPort
UR - http://sigport.org/5459
ER -
. (2020). dMazeRunner: Optimizing Convolutions on Dataflow Accelerators. IEEE SigPort. http://sigport.org/5459
, 2020. dMazeRunner: Optimizing Convolutions on Dataflow Accelerators. Available at: http://sigport.org/5459.
. (2020). "dMazeRunner: Optimizing Convolutions on Dataflow Accelerators." Web.
1. . dMazeRunner: Optimizing Convolutions on Dataflow Accelerators [Internet]. IEEE SigPort; 2020. Available from : http://sigport.org/5459

Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards

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14 May 2020 - 6:47am
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[1] , "Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards", IEEE SigPort, 2020. [Online]. Available: http://sigport.org/5280. Accessed: Oct. 01, 2020.
@article{5280-20,
url = {http://sigport.org/5280},
author = { },
publisher = {IEEE SigPort},
title = {Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards},
year = {2020} }
TY - EJOUR
T1 - Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards
AU -
PY - 2020
PB - IEEE SigPort
UR - http://sigport.org/5280
ER -
. (2020). Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards. IEEE SigPort. http://sigport.org/5280
, 2020. Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards. Available at: http://sigport.org/5280.
. (2020). "Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards." Web.
1. . Back-to-Back Butterfly Network, an Adaptive Permutation Network for New Communication Standards [Internet]. IEEE SigPort; 2020. Available from : http://sigport.org/5280

PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE


With the advent of Big Data application domains, several Machine Learning (ML) signal-processing algorithms such as Convolutional Neural Networks (CNNs) are required to process progressively larger datasets at a great cost in terms of both compute power and memory bandwidth. Although dedicated accelerators have been developed targeting this issue, they usually require moving massive amounts of data across the memory hierarchy to the processing cores and low-level knowledge of how data is stored in the memory devices to enable in-/near-memory processing solutions.

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Authors:
Joao Vieira, Nuno Roma, Gabriel Falcao, and Pedro Tomas
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14 May 2020 - 4:32am
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[1] Joao Vieira, Nuno Roma, Gabriel Falcao, and Pedro Tomas, "PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE", IEEE SigPort, 2020. [Online]. Available: http://sigport.org/5265. Accessed: Oct. 01, 2020.
@article{5265-20,
url = {http://sigport.org/5265},
author = {Joao Vieira; Nuno Roma; Gabriel Falcao; and Pedro Tomas },
publisher = {IEEE SigPort},
title = {PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE},
year = {2020} }
TY - EJOUR
T1 - PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE
AU - Joao Vieira; Nuno Roma; Gabriel Falcao; and Pedro Tomas
PY - 2020
PB - IEEE SigPort
UR - http://sigport.org/5265
ER -
Joao Vieira, Nuno Roma, Gabriel Falcao, and Pedro Tomas. (2020). PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE. IEEE SigPort. http://sigport.org/5265
Joao Vieira, Nuno Roma, Gabriel Falcao, and Pedro Tomas, 2020. PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE. Available at: http://sigport.org/5265.
Joao Vieira, Nuno Roma, Gabriel Falcao, and Pedro Tomas. (2020). "PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE." Web.
1. Joao Vieira, Nuno Roma, Gabriel Falcao, and Pedro Tomas. PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE [Internet]. IEEE SigPort; 2020. Available from : http://sigport.org/5265

SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING


SC-Flip (SCF) decoding is a low-complexity polar code decoding algorithm alternative to SC-List (SCL) algorithm with small list sizes. To achieve the performance of the SCL algorithm with large list sizes, the Dynamic SC-Flip (DSCF) algorithm was proposed. However, DSCF involves logarithmic and exponential computations that are not suitable for practical hardware implementations. In this work, we propose a simple approximation that replaces the transcendental computations of DSCF decoding. Moreover, we show how to incorporate fast decoding techniques with the DSCF algorithm.

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Authors:
Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross
Submitted On:
13 May 2020 - 8:23pm
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[1] Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross, "SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING", IEEE SigPort, 2020. [Online]. Available: http://sigport.org/5167. Accessed: Oct. 01, 2020.
@article{5167-20,
url = {http://sigport.org/5167},
author = {Furkan Ercan; Thibaud Tonnellier; Nghia Doan; Warren J. Gross },
publisher = {IEEE SigPort},
title = {SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING},
year = {2020} }
TY - EJOUR
T1 - SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING
AU - Furkan Ercan; Thibaud Tonnellier; Nghia Doan; Warren J. Gross
PY - 2020
PB - IEEE SigPort
UR - http://sigport.org/5167
ER -
Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross. (2020). SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING. IEEE SigPort. http://sigport.org/5167
Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross, 2020. SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING. Available at: http://sigport.org/5167.
Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross. (2020). "SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING." Web.
1. Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross. SIMPLIFIED DYNAMIC SC-FLIP POLAR DECODING [Internet]. IEEE SigPort; 2020. Available from : http://sigport.org/5167

Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator


Custom hardware accelerators of Convolutional Neural Networks (CNN) provide a promising solution to meet real-time constraints for a wide range of applications on low-cost embedded devices. In this work, we aim to lower the dynamic power of a stream-based CNN hardware accelerator by reducing the computational redundancies in the CNN layers. In particular, we investigate the redundancies due to the downsampling effect of max pooling layers which are prevalent in state-of-the-art CNNs, and propose an approximation method to reduce the overall computations.

Paper Details

Authors:
Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu
Submitted On:
26 September 2019 - 8:30pm
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[1] Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu, "Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator", IEEE SigPort, 2019. [Online]. Available: http://sigport.org/4844. Accessed: Oct. 01, 2020.
@article{4844-19,
url = {http://sigport.org/4844},
author = {Duvindu Piyasena; Rukshan Wickramasinghe; Debdeep Paul; Siew-Kei Lam; Meiqing Wu },
publisher = {IEEE SigPort},
title = {Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator},
year = {2019} }
TY - EJOUR
T1 - Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator
AU - Duvindu Piyasena; Rukshan Wickramasinghe; Debdeep Paul; Siew-Kei Lam; Meiqing Wu
PY - 2019
PB - IEEE SigPort
UR - http://sigport.org/4844
ER -
Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu. (2019). Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator. IEEE SigPort. http://sigport.org/4844
Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu, 2019. Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator. Available at: http://sigport.org/4844.
Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu. (2019). "Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator." Web.
1. Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu. Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator [Internet]. IEEE SigPort; 2019. Available from : http://sigport.org/4844

SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD

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Authors:
Cyrille Chavet, Fabrice Lozachmeur, Thomas Barguil, Awais Sani Hussein, Philippe Coussy
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11 May 2019 - 5:42pm
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[1] Cyrille Chavet, Fabrice Lozachmeur, Thomas Barguil, Awais Sani Hussein, Philippe Coussy, "SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD", IEEE SigPort, 2019. [Online]. Available: http://sigport.org/4455. Accessed: Oct. 01, 2020.
@article{4455-19,
url = {http://sigport.org/4455},
author = {Cyrille Chavet; Fabrice Lozachmeur; Thomas Barguil; Awais Sani Hussein; Philippe Coussy },
publisher = {IEEE SigPort},
title = {SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD},
year = {2019} }
TY - EJOUR
T1 - SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD
AU - Cyrille Chavet; Fabrice Lozachmeur; Thomas Barguil; Awais Sani Hussein; Philippe Coussy
PY - 2019
PB - IEEE SigPort
UR - http://sigport.org/4455
ER -
Cyrille Chavet, Fabrice Lozachmeur, Thomas Barguil, Awais Sani Hussein, Philippe Coussy. (2019). SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD. IEEE SigPort. http://sigport.org/4455
Cyrille Chavet, Fabrice Lozachmeur, Thomas Barguil, Awais Sani Hussein, Philippe Coussy, 2019. SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD. Available at: http://sigport.org/4455.
Cyrille Chavet, Fabrice Lozachmeur, Thomas Barguil, Awais Sani Hussein, Philippe Coussy. (2019). "SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD." Web.
1. Cyrille Chavet, Fabrice Lozachmeur, Thomas Barguil, Awais Sani Hussein, Philippe Coussy. SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD [Internet]. IEEE SigPort; 2019. Available from : http://sigport.org/4455

FFTTA presentation


This paper describes a low-power processor tailored for fast Fourier transform computations where transport triggering template is exploited. The processor is software-programmable while retaining an energy-efficiency comparable to existing fixed-function implementations. The power savings are achieved by compressing the computation kernel into one instruction word. The word is stored in an instruction loop buffer, which is more power-efficient than regular instruction memory storage.

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14 May 2019 - 8:31am
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[1] , "FFTTA presentation", IEEE SigPort, 2019. [Online]. Available: http://sigport.org/4345. Accessed: Oct. 01, 2020.
@article{4345-19,
url = {http://sigport.org/4345},
author = { },
publisher = {IEEE SigPort},
title = {FFTTA presentation},
year = {2019} }
TY - EJOUR
T1 - FFTTA presentation
AU -
PY - 2019
PB - IEEE SigPort
UR - http://sigport.org/4345
ER -
. (2019). FFTTA presentation. IEEE SigPort. http://sigport.org/4345
, 2019. FFTTA presentation. Available at: http://sigport.org/4345.
. (2019). "FFTTA presentation." Web.
1. . FFTTA presentation [Internet]. IEEE SigPort; 2019. Available from : http://sigport.org/4345

Multicarrier radar-communications waveform design for RF convergence and coexistence

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15 May 2019 - 1:28am
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[1] , "Multicarrier radar-communications waveform design for RF convergence and coexistence", IEEE SigPort, 2019. [Online]. Available: http://sigport.org/4229. Accessed: Oct. 01, 2020.
@article{4229-19,
url = {http://sigport.org/4229},
author = { },
publisher = {IEEE SigPort},
title = {Multicarrier radar-communications waveform design for RF convergence and coexistence},
year = {2019} }
TY - EJOUR
T1 - Multicarrier radar-communications waveform design for RF convergence and coexistence
AU -
PY - 2019
PB - IEEE SigPort
UR - http://sigport.org/4229
ER -
. (2019). Multicarrier radar-communications waveform design for RF convergence and coexistence. IEEE SigPort. http://sigport.org/4229
, 2019. Multicarrier radar-communications waveform design for RF convergence and coexistence. Available at: http://sigport.org/4229.
. (2019). "Multicarrier radar-communications waveform design for RF convergence and coexistence." Web.
1. . Multicarrier radar-communications waveform design for RF convergence and coexistence [Internet]. IEEE SigPort; 2019. Available from : http://sigport.org/4229

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