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A fast intra mode decision scheme for HEVC screen content coding is proposed to reduce the complexity of intra mode decision search for each coding unit. A fast block matching scheme for intra block copy is proposed to reduce the number of blocks for 2-D search. 39% and 35% encoding time reduction for lossy and lossless encoding scenarios with negligible quality loss are achieved under the SCC common test condition.

Scalable video coding consists in compressing the video sequence into a layered bitstream where each layer refers to different spatial, temporal or quality representation of the video. Scalability enables compression gain compared to the simulcast encoding of layers thanks to inter-layer predictions. The scalable HEVC extension (SHVC) is the latest scalable technology promising up to 30% bitrate gains under the common test conditions, defined by JCT-VC. These conditions do not consider UHD and use fixed quantization step, which is not relevant in operational environment.

Color pixel encoding optimizes the conversion of linear physical values of light into integer values. The efficiency of such encoding methods depends on a trade-off between the bit-depth used and the visible distortion introduced by quantization. This efficiency for different color pixel encoding approaches has been evaluated in literature, without considering the fact that before transmission to the end-user, color encoded content needs to be compressed using a video codec.

The High Efficiency Video Coding (HEVC) standard provides a substantial improvement in coding efficiency over previous video coding standards at the cost of a higher computational complexity. HEVC employs a quadtree based image structure by partitioning the image into coding units (CUs). Finding the optimal CU size in terms of rate-distortion is one of the most computationally challenging parts of any HEVC encoder.

The growing need for a powerful scalable video coding engine targeting the heterogeneous landscape of network, devices, and consumption environments has led to the development of the Scalable High Efficiency Video Coding (SHVC) standard, an extension of the High Efficiency Video Coding (HEVC) standard. To improve the SHVC compression efficiency, this paper proposes a novel joint layer coding mode to be integrated in the SHVC codec.

Digitally acquired high dynamic range (HDR) video baseband signal can take 10 to 12 bits per color channel. It is economically important to be able to reuse the legacy 8 or 10-bit video codecs to efficiently compress the HDR video. Linear or nonlinear mapping on the intensity can be applied to the baseband signal to reduce the dynamic range before the signal is sent to the codec, and we refer to this range reduction step as a baseband quantization. We show analytically and verify using test sequences that the use of the baseband quantizer lowers the coding efficiency.

The inter prediction decoding is one of the most time consuming modules in modern video decoders, which may significantly limit their real-time capabilities. To circumvent this issue, an efficient acceleration of the HEVC inter prediction decoding module is proposed, by offloading the involved workload to GPU devices. The proposed approach aims at efficiently exploiting the GPU resources by carefully managing the processing within the computational kernels, as well as by optimizing the usage of the complex GPU memory hierarchy.

We propose an improved saliency guided wavelet
compression scheme for low-bitrate image/video coding applications.
Important regions (faces in security camera feeds,
vehicles in traffic surveillance) get degraded significantly at low
bitrates by existing compression standards, such as JPEG/JPEG-
2000/MPEG-4, since these do not explicitly utilize any knowledge
of which regions are salient. We design a compression algorithm
which, given an image/video and a saliency value for each

This presentation analyzes parallel scalability and coding speed of our open-source Kvazaar HEVC intra encoder on Intel Xeon Phi 61-core coprocessor that supports up to four hardware threads per core. The evaluated parallelization schemes of Kvazaar are 1) Wavefront Parallel Processing (WPP); and 2) tiles, both accelerated with picture-level parallel processing. With WPP, the C implementation of Kvazaar high-quality preset achieves an average speedup of 1.3 and a bit rate gain of 0.7% over the respective implementation of x265.